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EXISTIMG SYSTEM

PROPOSED SYSTEM

EXISTING CONCEPT:

·         The problem of designing high-performance reverse converters has motivated continuous research using two main approaches to improve the performance of the converters: 1) investigate new algorithms and novel arithmetic formulations to achieve simplified conversion formulas and 2) introduce new moduli sets, which can lead to more simple formulations.

·         Thereafter, given the final simplified conversion equations, they are computed using well-known adder architectures, such as carry-save adders (CSAs) and ripple-carry architectures, to implement crary-propagate adders (CPAs).

PROPOSECD  CONCEPT:

·         The collected experimental results based on area, delay, and power consumption show that, as expected, the usage of the parallel-prefix adders to implement converters highly increases the speed at the expense of additional area and remarkable increase of power consumption. The significant growing of power consumption makes the reverse converter not competitive.

·         Two power-efficient and low-area hybrid parallel-prefix adders are presented in this brief to tackle with these performance limitations, leading to significant reduction of the power delay product (PDP).

EXISTING TECHNIQUE:

·         Hybrid regular parallel-prefix adder

PROPOSED TECHNIQUE:

         Hybrid modular parallel-prefix excess-one adder

EXISTING DEFINITION:

·         Parallel-prefix adders tehnique to find the Residue Number System. But it takes high power consumption and area overhead.

PROPOSED DEFINITION:

         Hybird regular parallel-prefix adder also find the Residue Number System. It takes the Low power consumption and area low.

DRAWBACKS:

·         High Power consumption

·         Delay and Area high

ADVANTAGES:

         Low power consumption

         Delay and Area Low