The Legend of Synchronizer

By Admin on

Long time ago, there were two warriors: Clock Domain 1 and Clock Domain 2. Each had their respective clocks CLK-1 and CLK-2 which they contended to be the master of their own will! The frequency and the phase relationship of the two clocks were independent of each other.

n absence of any such relationship, there is a possibility of the two clock edges being precariously close that could in turn cause a timing violation. The metastable output of the FF-2 could pass on to the entire system and disrupt the entire computation of the chip. FF-S steps in to resolve the impasse and urges the two clock domains to have a deterministic relationship between their clocks.

But the two clock domains refuse to budge! Neither of them were willing to curtail the freedom of their clocks which they deeply cherished! 
Here the FF-S sacrifices its own output and offers a solution to the clock domains.

hat's how the FF-S ensured the prosperity of the entire SoC by suffering a metastability at it's own output. And since then it's been called The SYNCHRONIZER Flop! Note that it is necessary to connect the synchronizer flop's clock to the clock of the second domain.
Over the years, there's been a practice of using up to three such synchronizer flops depending upon the application.
I'll talk about the concept of Mean Time Before Failure (MTBF) which is very closely related to metastability shortly.

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