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History & Evolution Of VLSI:
          The development of microelectronics spans a time which is even lesser than the average life expectancy of a human, and yet it has seen as many as four generations. Early 60’s saw the low density fabrication processes classified under Small Scale Integration (SSI) in which transistor count was limited to about 10. This rapidly gave way to Medium Scale Integration in the late 60’s when around 100 transistors could be placed on a single chip.

It was the time when the cost of research began to decline and private firms started entering the competition in contrast to the earlier years where the main burden was borne by the military. Transistor-Transistor logic (TTL) offering higher integration densities outlasted other IC families like ECL and became the basis of the first integrated circuit revolution. It was the production of this family that gave impetus to semiconductor giants like Texas Instruments, Fairchild and National Semiconductors. Early seventies marked the growth of transistor count to about 1000 per chip called the Large Scale Integration.

By mid eighties, the transistor count on a single chip had already exceeded 1000 and hence came the age of Very Large Scale Integration orVLSI. Though many improvements have been made and the transistor count is still rising, further names of generations like ULSI are generally avoided. It was during this time when TTL lost the battle to MOS family owing to the same problems that had pushed vacuum tubes into negligence, power dissipation and the limit it imposed on the number of gates that could be placed on a single die.


The second age of Integrated Circuits revolution started with the introduction of the first microprocessor, the 4004 by Intel in 1972 and the 8080 in 1974. Today many companies like Texas Instruments, Infineon, Alliance Semiconductors, Cadence, Synopsys, Celox Networks, Cisco, Micron Tech, National Semiconductors, ST Microelectronics, Qualcomm, Lucent, Mentor Graphics, Analog Devices, Intel, Philips, Motorola and many other firms have been established and are dedicated to the various fields in "VLSI" like Programmable Logic Devices, Hardware Descriptive Languages, Design tools,Embedded systems etc.


--->VLSI[very large scale integration] commonly classified in to two types

   1)Front End design

   2)Back End design

--->In earlier days computers were made of Vaccum tubes and it occupies the space in whole room.

--->The older computer performs 360 multiplications of 10 digits in a second.

--->Modern day computers are getting smaller,faster,cheaper and power efficient


The major design steps are

   1)Problem Specification

   2)Architectural Definition

   3)Functional Design 

   4)Logic Design

   5)Circuit Design

   6)Physical Design

       6.1)  Circuit Partitioning

       6.2)  Floor Planning and Placement

       6.3)  Routing

       6.4)  Layout Compaction

       6.5 Extraction and Verification


1.Problem Specification:  

---> The major parameters considered at this level are performance, functionality, physical dimensions, fabrication technology and design techniques. 

--->The  specifications include the size, speed, power and functionality of the VLSI system.

2. Architecture Definition: 

--->Basic specifications like Floating point units, which system to use, like RISC[Reduced Instruction Set Computer],CISC[Complex Instruction Set Computer] , number of ALU’s cache size etc.

3. Functional Design: 

---> Interconnect requirements between units.

--->Physical and electrical specifications of each unit.

4.Logic Design: 

---> Boolean expressions, control flow, word width, register allocation etc. are developed and the outcome is called a Register Transfer Level (RTL) description. T

5. Circuit Design: 

 --->Netlist is done in this step. 

--->Gates, transistors and interconnects are put in place to make a netlist.

6. Physical Design: 

--->The conversion of the netlist into its geometrical representation is done in this step and the result is called a layout.

6.1 Circuit Partitioning: 

--->Because of the huge number of transistors involved, it is not possible to handle the entire circuit 

---> Hence the whole circuit is broken down into blocks which are interconnected.

6.2 Floor Planning and Placement: 

--->Choosing the best layout for each block from partitioning step and the overall chip

6.3 Routing: 

---> Routing involves the completion of the interconnections between modules.

6.4 Layout Compaction: 

---> The compression of the layout from all directions to minimize the chip area thereby reducing wire lengths, signal delays and overall cost takes place in this design step.

6.5 Extraction and Verification: 

--->The circuit is extracted from the layout for comparison with the original netlist, performance verification, and reliability verification and to check the correctness of the layout is done before the final step of packaging.


--->The chips are put together on a Printed Circuit Board or a Multi Chip Module to obtain the final finished product.

The design can be done by FPGA and PLDs, Standard Cell (Semi Custom) and Full Custom Design.


      Current research is on reducing the area and delay in CMOS Transistor dimension and also increase the Transistor Count in Integrated Circuits.


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